* Qualcomm Technologies, Inc. MSM VIDC

[Root level node]
Venus
=====
Required properties:
- compatible : one of:
	- "qcom,msm-vidc"
        - "qcom,sdm845-vidc" : Invokes driver specific data for SDM845.
        - "qcom,sdm670-vidc" : Invokes driver specific data for SDM670.

Optional properties:
- reg : offset and length of the register set for the device.
- sku-index : sku version of the hardware.
- interrupts : should contain the vidc interrupt.
- qcom,reg-presets : list of offset-value pairs for registers to be written.
  The offsets are from the base offset specified in 'reg'. This is mainly
  used for QoS, VBIF, etc. presets for video.
- qcom,qdss-presets : list of physical address and memory allocation size pairs.
  when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be
  written to QDSS memory.
- *-supply: A phandle pointing to the appropriate regulator. Number of
  regulators vary across targets.
- clock-names: an array of clocks that the driver is supposed to be
  manipulating. The clocks names here correspond to the clock names used in
  clk_get(<name>).
- qcom,clock-configs = an array of bitmaps of clocks' configurations. The index
  of the bitmap corresponds to the clock at the same index in qcom,clock-names.
  The bitmaps describes the actions that the device needs to take regarding the
  clock (i.e. scale it based on load).

  The bitmap is defined as:
  scalable = 0x1 (if the driver should vary the clock's frequency based on load)
- qcom,allowed-clock-rates = an array of supported clock rates by the chipset.
- qcom,clock-freq-tbl = node containing individual domain nodes, each with:
     - qcom,codec-mask: a bitmap of supported codec types, every two bits
       represents a codec type.
         supports mvc encoder = 0x00000001
         supports mvc decoder = 0x00000003
         supports h264 encoder = 0x00000004
         supports h264 decoder = 0x0000000c
         supports mpeg1 encoder = 0x00000040
         supports mpeg1 decoder = 0x000000c0
         supports mpeg2 encoder = 0x00000100
         supports mpeg2 decoder = 0x00000300
         supports vp6 encoder = 0x00100000
         supports vp6 decoder = 0x00300000
         supports vp7 encoder = 0x00400000
         supports vp7 decoder = 0x00c00000
         supports vp8 encoder = 0x01000000
         supports vp8 decoder = 0x03000000
         supports hevc encoder = 0x04000000
         supports hevc decoder = 0x0c000000
     - qcom,cycles-per-mb: number of cycles required to process each macro
       block.
     - qcom,low-power-cycles-per-mb: number of cycles required to process each
       macro block in low power mode.
       the required frequency to get the final frequency, the factor is
       represented in Q16 format.
- qcom,use-non-secure-pil = A bool indicating which type of pil to use to load
  the fw.
- qcom,fw-bias = The address at which venus fw is loaded (manually).
- qcom,vidc-iommu-domains = node containing individual domain nodes, each with:
     - a unique domain name for the domain node (e.g vidc,domain-ns)
     - qcom,vidc-domain-phandle: phandle for the domain as defined in
       <target>-iommu-domains.dtsi (e.g msm8974-v1-iommu-domains.dtsi)
     - qcom,vidc-buffer-types: bitmap of buffer types that can be mapped into each
       IOMMU domain.
       - Buffer types are defined as the following:
           input = 0x1
           output = 0x2
           output2 = 0x4
           extradata input = 0x8
           extradata output = 0x10
           extradata output2 = 0x20
           internal scratch = 0x40
           internal scratch1 = 0x80
           internal scratch2 = 0x100
           internal persist = 0x200
           internal persist1 = 0x400
           internal cmd queue = 0x800
- cache-slice-names = An array of supported cache slice names by llcc
- cache-slices = An array of supported cache slice ids corresponding
  to cache-slice-names by llcc

[Second level nodes]
Context Banks
=============
Required properties:
- compatible : one of:
	- "qcom,msm-vidc,context-bank"
- iommus : A phandle parsed by smmu driver. Number of entries will vary
  across targets.

Optional properties:
- label - string describing iommu domain usage.
- buffer-types : bitmap of buffer types that can be mapped into the current
	IOMMU domain.
        - Buffer types are defined as the following:
          input = 0x1
          output = 0x2
          output2 = 0x4
          extradata input = 0x8
          extradata output = 0x10
          extradata output2 = 0x20
          internal scratch = 0x40
          internal scratch1 = 0x80
          internal scratch2 = 0x100
          internal persist = 0x200
          internal persist1 = 0x400
          internal cmd queue = 0x800
- virtual-addr-pool : offset and length of virtual address pool.
- qcom,fw-context-bank : bool indicating firmware context bank.
- qcom,secure-context-bank : bool indicating secure context bank.

Buses
=====
Required properties:
- compatible : one of:
	- "qcom,msm-vidc,bus"
- label : an arbitrary name
- qcom,bus-master : an integer descriptor of the bus master. Refer to arch/arm/\
  boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable masters
- qcom,bus-slave : an integer descriptor of the bus slave. Refer to arch/arm/\
  boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable slaves

Optional properties:
- qcom,bus-governor : governor to use when scaling bus, generally any commonly
  found devfreq governor might be used.  In addition to those governors, the
  custom Venus governors, "msm-vidc-ddr" or "msm-vidc-llcc" are also
  acceptable values.
  In the absence of this property the "performance" governor is used.
- qcom,bus-rage-kbps : an array of two items (<min max>) that indicate the
  minimum and maximum acceptable votes for the bus.
  In the absence of this property <0 INT_MAX> is used.
- qcom,ubwc-10bit : UBWC 10 bit content has different bus requirements,
  this tag will be used to pick the appropriate bus as per the session profile
  as shown below in example.

Example:

	qcom,vidc@fdc00000 {
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		venus-supply = <&gdsc>;
		venus-core0-supply = <&gdsc1>;
		venus-core1-supply = <&gdsc2>;
		qcom,reg-presets = <0x80004 0x1>,
			<0x80178 0x00001FFF>;
		qcom,qdss-presets = <0xFC307000 0x1000>,
			<0xFC322000 0x1000>;
		clock-names = "foo_clk", "bar_clk", "baz_clk";
		qcom,clock-configs = <0x3 0x1 0x0>;
		qcom,buffer-type-tz-usage-table = <0x1 0x1>,
						<0x1fe 0x2>;
		qcom,fw-bias = <0xe000000>;
		qcom,allowed-clock-rates = <200000000 300000000 400000000>;
		msm_vidc_cb1: msm_vidc_cb1 {
			compatible = "qcom,msm-vidc,context-bank";
			label = "venus_ns";
			iommus = <&venus_smmu 0x0a>,
				<&venus_smmu 0x0b>,
				<&venus_smmu 0x0c>;
			buffer-types = <0xfff>;
			virtual-addr-pool = <0x5dc00000 0x80000000>;
			qcom,secure-context-bank;
		};

		msm_vidc_cb2: msm_vidc_cb2 {
			compatible = "qcom,msm-vidc,context-bank";
			qcom,fw-context-bank;
			iommus = <&venus_smmu 0x100>,
				<&venus_smmu 0x106>;
		};

		bus_cnoc {
			compatible = "qcom,msm-vidc,bus";
			label = "venus-cnoc";
			qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
			qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
			qcom,bus-governor = "performance";
			qcom,bus-range-kbps = <1 1>;
		};

		venus_bus_ddr {
			compatible = "qcom,msm-vidc,bus";
			label = "venus-ddr";
			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;
			qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;
			qcom,bus-governor = "msm-vidc-ddr";
			qcom,bus-range-kbps = <1000 3388000>;
		};
		qcom,profile-dec-ubwc-10bit {
			qcom,codec-mask = <0xffffffff>;
			qcom,ubwc-10bit;
			qcom,load-busfreq-tbl =
				<979200 2446336>,  /* UHD30D     */
				<864000 2108416>,  /* 720p240D   */
				<489600 1207296>,  /* 1080p60D   */
				<432000 1058816>,  /* 720p120D   */
				<244800 616448>,   /* 1080p30D   */
				<216000 534528>,   /* 720p60D    */
				<108000 271360>,   /* 720p30D    */
				<0 0>;
		};
	};
