
		CS8221 NEAT (New Enhanced AT) chipset register


Read register:

	mov	al,reg_num      ; Register number
	out	22h,al
	jmp	short	$+2	; shot delay for CMOS chips
	jmp	short	$+2
	in	al,23h		; AL = register value
	jmp	short	$+2
	jmp	short	$+2

Write register:

	mov	al,reg_num	; Register number
	out	22h,al
	jmp	short	$+2
	jmp	short	$+2
	mov	al,data		; Data for write
	out	23h,al
	jmp	short	$+2
	jmp	short	$+2



	 Register description
	______________________

  Register 01
 =============
76543210
        
½
 Ĵ Ĵ Ĵ  
            DMA Clock Sourse
                    0 = SCLK/2
                    1 = SCLK
           EMR Bit
                     0 = Disable
                     1 = Enable 
          8 Bit DMA Wait States
                      00 = 1 Wait State
                      01 = 2 Wait States
                      10 = 3 Wait States
                      11 = 4 Wait States  
       16 Bit DMA Wait States
                       00 = 1 DMA Wait
                       01 = 2 DMA Waits
                       10 = 3 DMA Waits
                       11 = 4 DMA Waits 
    XIOR/XIOW Wait States
                        00 = 1 Wait State
                        01 = 2 Wait States
                        10 = 3 Wait States
                        11 = 4 Wait States  

 Register   60
 =============
76543210
        
½
 Ĵ      
          READY Timeout
                  Read Only  
         Reserved 
        NMI Enable
                    0 = Disable
                    1 = NMI Enable   
       Reserved 
      Processor Clock Select
                      0 = CLK2IN
                      1 = BCLK 
     CPU Reset - Read Only 
                       0
    82C11 Revision Number
                        00 Read Only 

 Register   61
 =============
76543210
        
½
   Ĵ Ĵ Ĵ
            I/O Command Delay
                    00 = 0 Cycles
                    01 = 1 Cycles
                    10 = 2 Cycles
                    11 = 3 Cycles 
         8 Bit Command Delay
                     00 = 0 Cycles
                     01 = 1 Cycles
                     10 = 2 Cycles
                     11 = 3 Cycles 
      16 Bit Command Delay
                      00 = 0 Cycles
                      01 = 1 Cycles
                      10 = 2 Cycles
                      11 = 3 Cycles 
   Quick Mode
                       0 = Enabled
                       1 = Disabled 
  Address Hold
                        0 = Disabled
                        1 = Enabled 

 Register   62
 =============
76543210
        
½
   Ĵ Ĵ Ĵ
            Bus Clock Source
                    00 = CLK2IN/2
                    01 = CLK2IN
                    10 = ATCLK
                    11 = Reserved 
         8 Bit Wait States
                     00 = 2 Wait States
                     01 = 3 Wait States
                     10 = 4 Wait States
                     11 = 5 Wait States 
      16 Bit Wait States
                      00 = 0 Wait States
                      01 = 1 Wait States
                      10 = 2 Wait States
                      11 = 3 Wait States 
   Reserved 
  Reserved 

 Register   64
 =============
76543210
        
½
        
         Reserved 
        Reserved 
       Reserved 
      Reserved 
     Reserved 
    Read Only 
   Read Only 
  Read Only 

 Register   65
 =============
76543210
        
½
        
         F000h ROM Disable
                 0 = Enabled
                 1 = Disabled 
        E000h ROM Disable
                  0 = Enabled
                  1 = Disabled 
       D000h ROM Disable
                   0 = Enabled
                   1 = Disabled 
      C000h ROM Disable
                    0 = Enabled
                    1 = Disabled 
     F000H Shadow Read Only
                     0 = Read/Write
                     1 = Read Only 
    E000H Shadow Read Only
                      0 = Read/Write
                      1 = Read Only 
   D000H Shadow Read Only
                       0 = Read/Write
                       1 = Read Only 
  C000H Shadow Read Only
                        0 = Read/Write
                        1 = Read Only 

 Register   66
 =============
76543210
        
½
        
         Reserved 
        Reserved 
       Reserved 
      Reserved 
     Reserved 
    0-256K Memory Status
                      0 = Disabled
                      1 = Off Board 
   256-512K Memory Status
                       0 = Disabled
                       1 = Off Board 
  128K Resolution
                        0 = Disabled
                        1 = Enabled 

 Register   67
 =============
76543210
        
½
 Ĵ Ĵ
               A000H 16K Shadow
                       0000 = All Disabled
                       0001 = A000H Enabled
                       0010 = A400H Enabled
                       0100 = A800H Enabled
                       1000 = AC00H Enabled
        B000H 16K Shadow
                        0000 = All Disabled
                        0001 = B000H Enabled
                        0010 = B400H Enabled
                        0100 = B800H Enabled
                        1000 = BC00H Enabled 

 Register   68
 =============
76543210
        
½
 Ĵ Ĵ
               C000H 16K Shadow
                       0000 = All Disabled
                       0001 = C000H Enabled
                       0010 = C400H Enabled
                       0100 = C800H Enabled
                       1000 = CC00H Enabled 
        D000H 16K Shadow
                        0000 = All Disabled
                        0001 = D000H Enabled
                        0010 = D400H Enabled
                        0100 = D800H Enabled
                        1000 = DC00H Enabled 

 Register   69
 =============
76543210
        
½
 Ĵ Ĵ
               E000H 16K Shadow
                       0000 = All Disabled
                       0001 = E000H Enabled
                       0010 = E400H Enabled
                       0100 = E800H Enabled
                       1000 = EC00H Enabled 
        F000H 16K Shadow
                        0000 = All Disabled
                        0001 = F000H Enabled
                        0010 = F400H Enabled
                        0100 = F800H Enabled
                        1000 = FC00H Enabled 

 Register   6a
 =============
76543210
        
½
 Ĵ      
          Reserved 
         Reserved 
        Reserved 
       Reserved 
      Reserved 
     # Banks 0/1
                       0 = 1 Bank
                       1 = 2 Banks 
    Banks 0/1 Type
                        00 = Disabled
                        01 = 256K/64K
                        10 = 256K
                        11 = 1M 

 Register   6b
 =============
76543210
        
½
     Ĵ Ĵ
           ROM Wait States
                   00 = 0 Waits
                   01 = 1 Waits
                   10 = 2 Waits
                   11 = 3 Waits 
        EMS Access Waits
                    00 = 0 Waits
                    01 = 1 Waits
                    10 = 2 Waits
                    11 = 3 Waits 
     EMS Enable
                     0 = Disabled
                     1 = Enabled 
    RAM Access Waits
                      0 = 0 Waits
                      1 = 1 Waits 
   1M Relocation
                       0 = Not Relocated
                       1 = Relocated 
  Interleave Enable
                        0 = Disabled
                        1 = Enabled 
                       Page Mode Enable
                        0 = Disabled
                        1 = Enabled 

 Register   6c
 =============
76543210
        
½
 Ĵ      
          Reserved 
         Reserved 
        Reserved 
       Reserved 
      4-Way Interleave
                      0 = 2 - Way
                      1 = 4 - Way 
     # Banks 2/3
                       0 = 1 Bank
                       1 = 2 Banks 
    Banks 2/3 Type
                        00 = Disabled
                        01 = Reserved
                        10 = 256K
                        11 = 1M 

 Register   6d
 =============
76543210
        
½
 Ĵ Ĵ
               EMS I/O Address
                       0000 = 208/209H
                       0001 = 218/219H
                       0101 = 258/259H
                       0110 = 268/269H
                       1010 = 2A8/2A9H
                       1011 = 2B8/2B9H
                       1110 = 2E8/2E9H
                       All others are
                       Reserved 
        EMS Base Address
                        0000 = C000H
                        0001 = C400H
                        0010 = C800H
                        0011 = CC00H
                        0100 = D000H
                        0101 = D400H
                        0110 = D800H
                        0111 = DC00H
                        1000 = E000H
                        All others are
                        Reserved 

 Register   6e
 =============
76543210
        
½
 Ĵ Ĵ Ĵ Ĵ
             EMS Page 3
                     00 = 1M - 2M
                     01 = 2M - 4M
                     10 = 4M - 6M
                     11 = 6M - 8M 
          EMS Page 2
                      00 = 1M - 2M
                      01 = 2M - 4M
                      10 = 4M - 6M
                      11 = 6M - 8M 
       EMS Page 1
                       00 = 1M - 2M
                       01 = 2M - 4M
                       10 = 4M - 6M
                       11 = 6M - 8M 
    EMS Page 0
                        00 = 1M - 2M
                        01 = 2M - 4M
                        10 = 4M - 6M
                        11 = 6M - 8M 

 Register   6f
 =============
76543210
        
½
 Ĵ     
           Reserved 
          CPU A20 Gate
                    MUST be 1 
         RAS Counter
                     0 = Disabled
                     1 = Enabled 
        Reserved 
       External EMS Mapper
                       0 = Disabled
                       1 = Enabled 
      EMS Amount
                        000 = Less than 1M
                        001 = 1.0M
                        010 = 2.0M
                        011 = 3.0M
                        100 = 4.0M
                        101 = 5.0M
                        110 = 6.0M
                        111 = 7.0M 

